Digital Design Studio

Digital Design Studio 2.0.2: Digital Design Studio. Check the selected host, account permissions and current support before use.

Use the selected host’s available analysis operation to create a new run; preserve its input identity, engine version, diagnostics and saved output. Cloud jobs require an offered operation, permission and QUOTA. Cloud UVM and the Physical coordinator runtime remain unavailable. Opening a saved run, a setup dialog or a tool catalogue does not submit a job, and a rejected or unsupported action is never a successful zero-valued result.

Overview

Digital Design Studio brings RTL editing, ISA design, analysis, verification, Evolve and ALcad into one application. Use the workspace menu to switch between RTL and the dedicated ALcad interface. Detailed ISA functions remain available in the left rail and Flow Navigator.

Choose a local desktop project or an authorized Cloud project, then use the same workspace navigation. Installation and execution support depend on the actual host and version. Downloads lists the current Linux package and Windows signed package with their validation status.

The editor also recognizes Verilog .v and .vh files, and .v is a supported RTL project input. See Verilog in Digital Design Studio for file handling and language coverage.

The dedicated ALcad interface

Choose Schematic, PCB Layout, 3D CAD, 3D Assembly, SI / PI Analysis, or Wafer Process & Fab from the ALcad group in the workspace menu. ALcad keeps its dedicated UI and tools. See the ALcad guide for workflow instructions and current support.

Evolve inside the IDE

Evolve is an integrated Digital Design Studio capability, not a separate product. When available, it explores RTL alternatives and keeps the candidates in the same workspace used for editing, analysis, and verification. A visible Evolve panel can still show an unavailable action when its runtime is not enabled.

Compatibility identifiers such as rtl_evolve, /api/evolve/*, .alEvolve, and the workspace evolve/ directory remain unchanged.

Install and Open

  1. Follow Linux installation or Windows installation, then First launch.

  2. Open or create a project in the host’s project chooser. For Cloud, select the intended organization first. The Windows app opens folders on your PC and does not open projects inside WSL (\\wsl$ or \\wsl.localhost paths). See Windows and WSL for projects created inside WSL with earlier releases.

  3. Confirm the project name and root in Explorer. Use the workspace menu for RTL or ALcad and Flow Navigator for ISA and engineering actions.

On Windows, choose Local → Projects on this PC → Open project folder, New project, or Open example. The counter example and Testbench flow in this guide are Windows-specific. For the separately published Linux app and CLI launcher, follow the Linux installation guide and the supported scope of that package.

Bash
altifigence-ide --project /absolute/path/to/project
alti ide open --project /absolute/path/to/project

The CLI also provides project initialization, files, settings, Git and Cloud commands; ide open is only the desktop launcher. See CLI engine commands. Theme, shortcuts and language belong in Settings.

First Project Quickstart

Use a new, non-sensitive directory containing one known-good .sv or .v file under rtl/ or tb/, for example rtl/top.sv. The project directory must already exist and its absolute path must be known.

What Explorer Lists

The current Folder tree shows the complete listing supplied by the selected project host, including root files, docs/, and analyze/ when the host returns them. Its heading uses the project name. It is no longer limited to rtl/ and tb/. Hierarchy instead shows the design structure derived from source.

Complete host listing does not mean unrestricted access to every filesystem entry. In the Windows app, Explorer applies the following bounds; other hosts can expose different supported file types and limits:

  • Skipped directories, with everything below them: .git, .alti, .altifigence, .venv, __pycache__, node_modules, target, .pytest_cache, dist, dist-electron.

  • Skipped entries: symbolic links, and any file whose extension is not in the supported set.

  • Supported extensions: sv, svh, v, vh, allab, py, md, rst, json, html, toml, yml, yaml, tcl, rpt, ini, sh, c, h, rs, sail, cx, asm, s, js, mjs, ts, tsx, css, spef, cir, txt, sdc, xdc and vcd, plus .gitkeep and saved GDS layouts (.gds, .gdsii).

  • Bounds: one listing returns at most 500 files and stops after examining 10,000 directory entries. A very large tree can therefore be listed only in part; that is a size bound, not a filter on where sources may live.

If an entry is missing, check the selected root, refresh the listing, and review host filtering and size limits before moving or recreating files.

Steps

  1. Open the directory from the current host’s project chooser. In the Windows app, choose Local → Projects on this PC → Open project folder

  2. In Explorer, confirm that the displayed root is the directory you chose.

  3. Open your known source file and make a harmless comment-only change.

  4. Use Save File or Ctrl+S.

  5. Confirm that the dirty marker clears and review Problems for current editor diagnostics.

  6. Close the IDE window, launch it on the same absolute project directory again, and confirm that the saved comment is present.

  7. Revert or keep the comment in your normal version-control workflow.

First success means the correct directory opened and a deliberate file edit survived a reopen. It does not require a compiler, simulator, synthesis tool, board, Cloud job, or local RTL engine.

First RTL simulation opens the counter example in the 2.0.2 Windows app, installs the optional OSS simulators after confirmation and runs its testbench on your PC. Sign in first; Free is sufficient. Cloud projects and Linux packages do not offer this Testbench flow.

Back up or move the project using Local Workspaces and Data Boundaries before changing the original directory.

Local and Online Actions

Opening, editing, and saving a local Desktop project does not upload it. Cloud projects use their Cloud storage service. Analyze, Verify, Implement, Evolve, and other online actions can have separate availability and may send selected source or artifacts. Check the action and destination before submitting restricted project data.

Current Limitations

Use Downloads for the platform’s current validation state and System requirements for its prerequisites. The Windows app needs no device licence. Signed in on any plan, including Free, you can use local features such as Git, SystemVerilog completion and parameter hints, RTL lint and compiler diagnostics and the RTL module tree; without signing in, you can edit and save files. External toolchains and vendor licences are needed only when the chosen action uses them.

The Windows Testbench tutorial uses the selected external Icarus Verilog or Verilator simulator and records its version, log and source identities. It is distinct from unavailable server analysis. GDS inspection, circuit calculations and manufacturing exports each keep their own scope.

Related Pages

  • ISA workflows — author CX sources in the same project. RISC-V import is supported; generation, execution and verification depend on the selected host. Event Trace opens the shared Analysis viewer instead of a second ISA timeline.

  • Verilog in Digital Design Studio — recognized file types, project input, and the current IEEE 1364 conformance boundary.

  • Workspace — the side panels, editor tabs and splits, find and go to line, the command palette, Problems, the terminal, Outline, and project search.

  • Analysis Views — saved analysis runs, the run list and tool picker, each viewer’s controls and axes, and which viewers read the run you selected.

  • SPICE DC operating point — run saved resistor and DC-source circuits with the separate R/I and R/I/V analyses.

Company AI and Cloud usage

Company AI is available through the web and desktop AI panel after the account, country, age and consent checks. Company AI lists supported tasks and data processing. Company AI and eligible Compute share the weekly QUOTA; Cloud files follow the organization storage limit. Opening or saving a My PC file does not itself submit it to AI or Cloud.

Using Digital Design Studio 2.0.2

Digital Design Studio 2.0.2 uses one application for RTL, ISA in Flow Navigator, and ALcad. Windows My PC, Linux desktop and Cloud have different execution hosts. A visible command or settings page does not establish that its engine is available. Check the selected host and the operation result before interpreting an output.

Cloud UVM and the Physical coordinator runtime remain unavailable. Built-in HLS, QEDA layout/solvers and virtual-FPGA Evolve require the Linux native host; they do not run on Windows or Cloud. Static OpenQASM circuit import is a separate Windows/Linux capability. A result viewer, imported report or AI response is not an engine execution or manufacturing signoff.

The interface selector offers 14 languages: English, Korean, Japanese, Russian, Spanish, Simplified Chinese, Traditional Chinese, German, Brazilian Portuguese, Hindi, Vietnamese, French, Indonesian and Italian. Newly added DDS languages es, zh-cn, de, pt-br, hi, vi, fr, id and it can fall back to English for untranslated strings. This release’s revised documentation is prepared in English and Korean; existing translations are not proof that the 2.0.2 revision is translated. Use the English revision for current details when another language is older. Community’s forum interface is English.

2.0.2 environment support

Use the navigation for daily work

  1. Open the intended My PC or Cloud project and check Explorer. Use Search windows to return to an existing numbered window.

  2. Edit and save the source. Use Flow Navigator for RTL/ISA and the workspace menu for ALcad; inspect the selected operation’s host support.

  3. For an Agent request, check the project context and consent, then read Usage before sending. Open the history page to find an existing conversation.

  4. For a run, follow its status and save the result with its source identity. Reopening a stored result does not launch another job.